Semiconductor fabrication typically involves forming conductive connections between substrate locations which are elevationally separated by one or more layers. To do so, portions of such layers must ordinarily be removed. Typically, such layer portions are removed by patterning and etching a contact opening through the overlying layers of material to expose an elevationally lower substrate location with which a conductive connection is desired. Such constitutes a first masking step in which a first mask is used to pattern the desired contact opening.
Subsequently, conductive material is formed within the contact opening to interconnect desired elevationally separated layers. Typically, following the interconnect step, the outermost elevationally separated layer is patterned and etched in a second masking step which utilizes a second mask which is different from the first mask. Such might be the case when, for example, the outermost layer is patterned into a conductive line.
Accordingly, at least two separate masks are needed to respectively pattern two different layers of photoresist which are required to be formed at separate times over the substrate and at different processing points in the processing flow. It is desirable to reduce the number of processing steps which are required in a processing flow.
This invention grew out of concerns associated with simplifying semiconductor processing and reducing the number of processing steps which are required in a processing flow.